In the field of integrated circuit packaging, it is known to include a plurality of integrated circuits in a single package body. Bond pads of each integrated circuit are electrically connected by bond wires to leads of the package. The leads are subsequently electrically connected to metal traces on a printed circuit board upon which the package is mounted. Providing a plurality of integrated circuits in one package allows an increase in package density without a significant increase in the area of the printed circuit board that is consumed by the package.
A problem with conventional packages, even packages that contain a plurality of integrated circuits, is that further increases in density per unit area of the printed circuit board are not easily attainable. So, for example, if a package includes two sixteen megabit memory integrated circuits (total thirty-two megabits), then increasing the total amount of memory to 128 megabits would require three additional packages, each of which would require additional mounting area on the printed circuit board.
One known method to increase package density is to mount a first small outline integrated circuit package ("SOIC") having either gull wing or J lead styles on a printed circuit board. The leads are soldered to metal traces on the printed circuit board. Next, the leads of a second SOIC package are cut in length so as to form lead stubs. The second SOIC package is then stacked on top of the first SOIC package, and the lead stubs of the second SOIC package are soldered to the lead stubs of the first SOIC package. This arrangement has obvious shortcomings. First, SOIC packages tend to be thick and much larger rather than the integrated circuit. Thus, a stack of two SOIC packages will have a large footprint and will extend rather high above the printed circuit board. Second, SOIC packages are not meant to be stacked. It is difficult and time consuming to cut the leads of the second SOIC and then solder the cut leads to the leads of the first SOIC. Third, only two SOIC packages can typically be stacked in this manner due to the size of the SOIC packages and the leads. Finally, the footprint of the first SOIC package on the printed circuit board is relatively large due to the gull wing or J-style leads.